1. Technical Field
This invention relates generally to memory devices, and more particularly, to Metal-Insulator-Metal (MIM) devices and methods of fabrication thereof.
2. Background Art
FIGS. 1 and 2 illustrate a method of fabricating a Metal-Insulator-Metal (MIM) device using etching techniques. Initially, conductive layer 22 is provided on a substrate 20. Next, an insulating layer 24 is provided on the conductive layer 22. Then, another conductive layer 26 is provided on the insulating layer 24. It will be understood that the conductive layers 22, 26 and insulating layer 24 may be of as variety of materials. (It is further understood that the term “MIM” is used to describe such a device even though, for example, the top and/or bottom layers 22, 26 may be nonmetallic). Next, a photoresist layer 28 is provided over the conductive layer 26 and, using standard photolithographic techniques, the photoresist layer 28 is patterned as shown. Using the patterned photoresist layer 28 as a mask, the exposed material is etched assay to remove portions of the conductive layer 22, insulating layer 24, and conductive layer 26, to form the remaining MIM stack 30 on the substrate 20. The photoresist 28 is then removed, resulting in the MIM device 30 including electrode 22A, insulating layer 24A, and electrode 26A formed on the substrate 20.
It will be understood that the device stack must be properly formed to ensure proper operation of the device 30. For example, it is highly desirable that the etchant provide proper, even etching of the materials of the electrodes 22, 26 and insulating layer 24, meanwhile leaving the exposed material of the substrate 20 substantially intact (the “selectivity” of the etchant refers to the ability to properly remove selected material while leaving other material in contact therewith substantially intact). While the MIM device 30 of FIG. 2 is shown as ideally formed, it has occurred that, depending on the materials selected for the electrodes 22, 26 and insulating layer 24, and the etchant used, uneven etching of the materials of the layers 22, 24, 26 can take place, resulting in improper formation of the MIM stack 30 (for example one layer may etch more rapidly than the other layers, resulting in a larger amount of that layer being etched away than the other layers (FIG. 3). In addition, undesirable gouging of the substrate 20 and layers 22, 24, 26 may take place. These phenomena cause degradation in performance in the resulting memory device.
In addition the above described approach has limited scaleability, resulting in less efficient manufacturing approaches.
Therefore, what is needed is an approach which avoids the above-cited problems, providing a properly and consistently formed MIM device with improved scaleability.